Robust hardware design platform built around Altera's SoC FPGA

Featuring high-speed DDR3 memory, analog-to-digital capabilities, and Ethernet networking, Terasic's DE0-Nano-SoC development kit is now stocked by Farnell element14. The DE0-Nano-SoC development kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core ARM Cortex-A9 embedded cores with industry-leading, programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera's SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth, interconnect backbone. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog-to-digital capabilities, Ethernet networking, and much more that promise many exciting applications. The DE0-Nano-SoC development kit contains all the tools needed to use the board in conjunction with a computer that runs Microsoft Windows XP or later, says the company.