Wireless jitter attenuating clock multiplier development kit
17-08-2015 |
Mouser Electronics
|
Design & Manufacture
Used for evaluating the ultra low-Jitter, any-frequency, 12-output JESD204B
clock generator, Silicon Labs' Si5380-EVB wireless jitter attenuating clock
multiplier development kit is now available from Mouser stock.
The Si5380 employs 4th generation DSPLL technology to enable clock
generation for LTE / JESD204B applications which require the highest level
of jitter performance. The Si5380-EVB has four independent input clocks and
a total of 12 outputs. The Si5380-EVB can be easily controlled and
configured using Silicon Labs' Clock Builder Pro (CBPro) software tool.
wireless jitter attenuating clock multiplier development.
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