Low-voltage memory improves power consumption in battery-powered devices

06-09-2017 | Microchip Technology | Semiconductors

Microchip’s new 1.8V Serial Quad I/O SuperFlash memory device, the SST26WF064C, is a low-voltage 64-Megabit device, combines DTR with proprietary SuperFlash NOR Flash technology, making it ideal for wireless and battery-powered applications. Typical chip-erase time for the device is between 35 and 50 milliseconds, compared to competitive Flash devices which take more than 30 seconds to erase. The device also integrates a hardware-controlled reset functionality enabling a robust device reset. Most serial Flash devices in the market do not support hardware reset function due to pin-count limitations on the package. With this device, customers have the option to reconfigure the HOLD# pin for this reset function. Operating at frequencies reaching 104MHz, the device enables minimum latency XIP capability without the need for code shadowing on SRAM. The new device uses a 4-bit multiplexed I/O serial interface to boost performance while maintaining the compact form factor of standard serial Flash devices. The device also supports full command-set compatibility with traditional SPI protocol. The company’s high-performance SuperFlash technology also means the device is based on a proprietary split-gate Flash memory cell giving additional capabilities such as high endurance cycling of up to 100,000 erase/write cycles, data retention of over 100 years and the industry’s fastest erase times.
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