New power MOSFET package offers high efficiency and high-power density

Infineon Technologies AG has released the new generation of OptiMOS Source-Down (SD) power MOSFETs. They are supplied in a PQFN 3.3mm x 3.3mm2 package and a broad voltage class ranging from 25V up to 100V. This package sets a new standard in power MOSFET performance, providing higher efficiency, higher power density, superior thermal management and low BOM. The PQFN addresses applications including motor drives, SMPS for server and telecom and OR-ing, and battery management systems.

Compared to the standard Drain-Down concept, the latest SD package technology offers a larger silicon die in the same package outline. Also, the losses contributed by the package, limiting the overall performance of the device, can be reduced. This allows a reduction in R DS(on) by up to 30% compared to the state-of-the-art Drain-Down package. The benefit at the system level is a shrink in the form factor with the chance to move from a SuperSO8 5mm x 6mm2 footprint to a PQFN 3.3mm x 3.3mm2 package with a space reduction of about 65%. This provides for the available space to be utilised more effectively, improving the end system's power density and efficiency.

Furthermore, in the SD concept, the heat is dissipated straight into the PCB via a thermal pad instead of over the bond wire or the copper clip. This enhances the thermal resistance R thJC by more than 20%, from 1.8K/W down to 1.4K/W, therefore, allowing simplified thermal management. There ares two different footprint versions and layout options: the SD Standard-Gate and the SD Center-Gate. The Standard-Gate layout simplifies the drop-in replacement of Drain-Down packages, while the Center-Gate configuration provides optimised and more straightforward parallelisation. These two options can bring optimal device arrangement in the PCB, optimised PCB parasitics, and ease of use.