Solution delivers 10X increased performance for on-chip passive component synthesis

Cadence Design Systems, Inc now offers the new Cadence EMX Designer, a passive device synthesis and optimisation technology that provides, in split seconds, design rule check (DRC)-clean parametric cells (PCells) and accurate electromagnetic (EM) models of passive devices, like inductors, transformers, T-coils and more. Seamlessly incorporated with the Cadence Virtuoso ADE Product Suite, the solution provides more than 10X faster synthesis times, with notable productivity gains versus other solutions.

The solution allows customers to rapidly synthesise DRC-clean passive devices at a touch of a button based on electrical and geometrical needs. With unparalleled flexibility, the PCells can readily be modified to fulfil the designers’ exact layout needs, utilising a long list of options from a user-friendly interface inside the Virtuoso platform. When employed with the EMX 3D Planar Solver, the solution provides the accuracy of generated models. The seamless integration with the Virtuoso platform gives users various options for plotting and appending results.

“pSemi evaluated the Cadence EMX Designer solution as we were interested in automating the passive device creation and optimisation process for our proprietary PDKs,” said John Sung, vice president of Engineering Infrastructure at pSemi. “EMX Designer fully met our requirements for PCell flexibility, speed and accuracy. It is seamlessly integrated into the Cadence design flow and will improve the productivity of our design teams.”

“The new EMX Designer solution adds key technology to our leading Custom IC design flow, delivering the most flexible passive-device PCells in record-breaking time while also enabling significant productivity gains,” said Tom Beckley, senior vice president and general manager, Custom IC and PCB Group at Cadence. “We are pleased to offer our customers an expanded, complete, highly differentiated and efficient IC design platform that addresses the early stages of the design all the way through to signoff and closure.”

“Using Cadence’s new EMX Designer solution, our team was able to improve productivity and reduce design cycle times,” said Peter Gammel, CEO, Ubilite. “We managed to synthesise passive devices with better performance and at the same time, save 20% silicon area for the advanced process nodes we use with the new solution. EMX Designer offers us a versatile library of passive devices, delivering extremely accurate results across all process nodes at incredibly fast speeds.”

The solution seamlessly interfaces with the company's EMX 3D Planar Solver and further supports the Intelligent System Design strategy, enabling SoC design excellence and system innovation.