After announcing the world's first 300mm GaN power wafer and opening the world's largest 200mm SiC power fab, Infineon Technologies AG revealed the next milestone in semiconductor manufacturing technology. The company has reached a breakthrough in handling and processing the thinnest silicon power wafers ever manufactured, with a thickness of only 20µm and a diameter of 300mm, in a high-scale semiconductor fab. The ultra-thin silicon wafers are only a quarter as thick as a human hair and half as thick as current state-of-the-art wafers of 40-60µm.
"The world's thinnest silicon wafer is proof of our dedication to deliver outstanding customer value by pushing the technical boundaries of power semiconductor technology," said Jochen Hanebeck, CEO at Infineon Technologies. "Infineon's breakthrough in ultra-thin wafer technology marks a significant step forward in energy-efficient power solutions and helps us leverage the full potential of the global trends decarbonisation and digitalisation. With this technological masterpiece, we are solidifying our position as the industry's innovation leader by mastering all three relevant semiconductor materials: Si, SiC and GaN."
This innovation will greatly help increase energy efficiency, power density, and reliability in power conversion solutions for AI data centres and consumer, motor control, and computing applications. Halving the thickness of a wafer reduces the wafer's substrate resistance by 50%, reducing power loss by more than 15% in power systems, compared to solutions based on conventional silicon wafers. For high-end AI server applications, where higher current levels drive growing energy demand, this is particularly important in power conversion: Here voltages have to be reduced from 230V to a processor voltage below 1.8V. The ultra-thin wafer technology boosts the vertical power delivery design based on vertical Trench MOSFET technology and allows a very close connection to the AI chip processor, thus reducing power loss and enhancing overall efficiency.
"The new ultra-thin wafer technology drives our ambition to power different AI server configurations from grid to core in the most energy efficient way," said Adam White, division president, Power and Sensor Systems at Infineon. "As energy demand for AI data centres is rising significantly, energy efficiency gains more and more importance. For Infineon, this is a fast-growing business opportunity. With mid-double-digit growth rates, we expect our AI business to reach one billion euros within the next two years."
To overcome the technical hurdles in reducing wafer thickness to 20µm, Infineon engineers had to establish an innovative and unique wafer grinding approach, since the metal stack that holds the chip on the wafer is thicker than 20µm. This greatly influences the handling and processing of the backside of the thin wafer. Additionally, technical and production-related challenges like wafer bow and wafer separation have a major impact on the backend assembly processes, ensuring the stability and first-class robustness of the wafers. The 20µm thin wafer process builds on the company's existing manufacturing expertise. It ensures that the new technology can be seamlessly integrated into existing high-volume Si production lines without incurring additional manufacturing complexity, thus guaranteeing the highest possible yield and supply security.
Infineon will publicly present the first ultra-thin silicon wafer at electronica 2024, Hall C3, Stand 502, 12-15 November.
