TSMC and MIT Announce 1nm Technology Just After IBMs 2nm Device
02-06-2021 | By Robin Mitchell
Recently, a joint venture between TSMC, MIT, and NTU announced the development of 1nm features that help to solve the many challenges faced with nm devices. What are monolayer transistors, what did the venture demonstrate, and how far can we take semiconductor technology?
What are monolayer transistors?
To continue the trend of fitting more transistors onto a chip each year, researchers are looking at all aspects of semiconductor design as potential paths to this reduction. For example, researchers have recently developed the Standing Gate Transistor, which considerably reduces DRAM sizes, while other researchers look to stacking chips in 3D layers.
However, the most popular approach to increasing transistor density is to physically reduce the size of each transistor, or specifically, the size of features (often referred to as the node). In the past, this was done by improvements in lithography to create smaller structures. Still, now that transistors are approaching the nm scale, individual features of such transistors are only a handful of atoms, and individual atoms cannot be made smaller.
One area that is of increasing interest to researchers is monolayers; these are layers of a particular compound that form a molecular sheet only one unit high. Some may think that a monolayer is only one atom thick, but it refers to a crystalline structure that is only one unit high (where the unit would be a particular arrangement of atoms).
Monolayers are interesting as they often exhibit unusual properties not found in standard crystalline structures. For example, graphene is a monolayer that has a high conductivity but can interact with other monolayers to form semiconductors. Furthermore, a monolayer is the smallest size possible for material, and such marks the physical limitation of that material (i.e. there is no further shrinkage possible). Additionally, monolayers often have quantum properties and can be useful in the development of quantum computers and devices. For example, electron flow in a monolayer of carbon is not a result of free electrons moving through a crystalline structure (as in a metal). Instead, the conductive and valance band physically touch.
TSMC, MIT, and NTU Collaboration Unveils Monolayer Achievements Towards 1nm
Recently, TSMC, MIT, and NTU in a joint venture announced the development of 1nm features that will enable the future production of 1nm devices. However, challenges faced by current semiconductors is the resistance between metals and semiconductors (called the Schottky Barrier), and the resulting current limitations formed by such barriers. As such, the group approached this challenge with the development of semi-metallic bismuth contacts with monolayer transition metal dichalcogenides.
Simply put, the researchers have been able to combine monolayers with bismuth to create electrical contacts that allow a semiconductor material to connect to metal interconnections in a semiconductor more easily. The resulting contacts have a resistance of 123 Ωum and an on-state current density of 1,135 uA/um on a monolayer of Molybdenum Sulfide (MoS2). The contacts also proved to be effective on other monolayers including WS2 and WSe2.
While a 1nm transistor device was not manufactured, the ability to create small contacts that reduce the Schottky Barrier to its minimal possible value means that devices can conduct more current, produce less waste heat, and operate at higher frequencies. Furthermore, the ability to create such contacts on monolayers provides future nanometer designs with an already developed contact method thereby reducing the amount of research required to create functional devices.
How will monolayer devices help to keep Moore’s Law alive?
While some semiconductor experts detest the term Moore’s Law and the surrounding hype, it is important for the semiconductor industry. It essentially keeps semiconductor manufacturers on their toes to improve technology. The term Moore’s Law initially stated that transistor counts on devices double once every two years, but it should be stated that this is not a “law” and more of an observation. Furthermore, devices do not need to be explicitly reduced in size to increase transistor counts; the use of 3D structures can contribute to increased device performance as well as the use of chiplets.
While some manufacturers turn towards 3D structures in semiconductors, others are looking towards monolayers as the next-generation solution to increasing device performance. 3D structures offer the advantage of using already available technology, but this still comes with its own challenges. Monolayer semiconductors, if possible, will enable transistors that are extremely small (by today’s standards), and could possibly see 100 billion transistors on a single planer device. This is important because once this has been achieved, 3D technology can then be combined with monolayer technology to create extremely small chips that hold thousands of billions of transistors.
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