RISC-V SoC FPGA architecture brings real-time to Linux allowing developers to innovate

Microchip, via its Microsemi Corporation subsidiary, has extended its Mi-V ecosystem with a new class of SoC FPGAs. The new family joins what is claimed to be the industry’s lowest power mid-range PolarFire FPGA family with a total microprocessor subsystem based on the open, royalty-free RISC-V Instruction Set Architecture. The company’s new PolarFire SoC architecture brings real-time deterministic AMP capability to Linux platforms in a multi-core coherent CPU cluster. The SoC architecture, developed in collaboration with SiFive, emphasises a flexible 2MB L2 memory subsystem that can be configured as a cache, scratchpad or direct access memory. This enables designers to implement deterministic real-time embedded applications simultaneously with a rich operating system for a variety of thermal and space-constrained applications in collaborative, networked IoT systems. The SoC includes extensive debug capabilities incorporating instruction trace, 50 breakpoints, passive run-time configurable AXI bus monitors and FPGA fabric monitors, in addition to the company's built-in two-channel logic analyser, SmartDebug. The SoC architecture combines reliability and security features such as SEC-DED on all memories, physical memory protection, a DPA safe crypto core, defence-grade secure boot and 128Kb Flash boot Memory. Evaluation and design with SoC are supported by the antmicro Renode system modelling platform, which is now integrated with the company's SoftConsole IDE for embedded designs targeting PolarFire SoCs. A SoC development kit is also available, comprising of the PolarFire FPGA-enabled HiFive Unleashed Expansion Board and SiFive’s HiFive Unleashed Development Board with its RISC-V microprocessor subsystem. The company is also launching a new Mi-V Embedded Experts Program, a global partner network to help customers in hardware/software designs for the SoC. Adding the programme enables support through the entire lifecycle of customer products and serves to jump-start designs and shorten time to market. Members can also access direct technical support and early introduction to development platforms and silicon. RISC-V Summit, Dec 4-5, 2018