19-10-2023 | Microchip Technology | Semiconductors
Microchip Technology has announced a new family of PIC32CZ CA 32-bit MCUs with a 300MHz Arm Cortex-M7 processor, an integrated Hardware Security Module (HSM), and a wide range of connectivity and Flash memory options for extra flexibility.
The new family of devices includes the PIC32CZ CA90 with an HSM or the PIC32CZ CA80 without the integrated HSM. The HSM in the PIC32CZ CA90 is a monolithic solution that supplies advanced security for industrial and consumer applications. The HSM functions as a secure subsystem with a separate MCU on board that runs the firmware and security features, including hardware secure boot, key storage, cryptographic acceleration, true random number generator and more.
For products that need extra security, factory provisioning is obtainable on the PIC32CZ CA90, which, upon completion, supplies customers with pre-provisioned devices ready to be deployed. The company's Trust Platform Development Suite is an in-house secure provisioning tool that allows a secure supply chain channel at scale or in low-volume production.
"The PIC32CZ CA microcontrollers make it easier for our customers to implement embedded security features into their design," said Rod Drake, corporate vice president of Microchip's MCU32 business unit. "These are extremely versatile MCUs with the option of factory provisioning at low-volume production and other customizable configurations such as connectivity and memory to fit many different requirements."
The MCUs can be configured employing various connectivity options, including USART/UART, I2C, SPI, CAN FD, High-Speed USB and Gigabit Ethernet. The Ethernet option includes Audio Video Bridging and PTP based on the IEEE 1588 standard. To mitigate data corruption, these devices are scalable with 2, 4 or 8MB of onboard Flash, 1MB of SRAM, and ECC memory.
The devices are supported by the PIC32CZ CA90 Curiosity Ultra Development Board, the PIC32CZ CA80 Curiosity Ultra Development Board and MPLAB Harmony v3 to test, program and debug in the design phase.
