New apps with first four-state emulation and mixed-signal modelling accelerates SoC verification

Cadence Design Systems, Inc. offers a new portfolio of applications that greatly improve the capabilities of its flagship Palladium Z2 Enterprise Emulation System. These domain-specific apps enable customers to manage increasing system design complexity, improving system-level accuracy and accelerating low-power verification for advanced applications, such as AI/ML, hyperscale and mobile.

Today's designs push the envelope on complexity, and customers require capacity, performance, and debug efficiency to satisfy time-to-market demands. These new apps and updates offer industry-leading performance and features to meet these growing challenges. The new and enhanced Palladium Apps are:

The 4-State Emulation App is the first four-state emulation capability allowing acceleration of simulations needing X-propagation, such as for low-power verification of complex SoCs with multiple switched power domains.

Real Number Modeling App is the first real number model emulation capability to accelerate simulations on mixed-signal designs.

Dynamic Power Analysis App is a next-generation massively parallel architecture for multi-billion-gate, million-clock-cycle power analysis of complex SoCs up to 5X faster than its previous versions.

"To keep up with today's advanced SoC design requirements, customers need an emulation solution that offers high performance with fast, predictable compile and debug," said Dhiraj Goswami, corporate vice president, Hardware System Verification R&D at Cadence. "With the release of these new Palladium Apps, for the first time in our industry, our customers can now accelerate X-propagation and mixed-signal on emulation."

The emulation system is part of the wider Cadence Verification Suite and supports the company's Intelligent System Design™ strategy, enabling SoC design excellence.

"NVIDIA has utilised Cadence Palladium Emulation for many years for our early software development, hardware-software verification and debug tasks. We have worked closely with Cadence to provide input on the new Palladium apps, including the industry's first Real Number Modeling and 4-State Emulation apps. Using the new apps, we can accelerate and integrate real number modelling constructs as part of our large GPUs, improving system-level accuracy of analog, digital and software behaviours and accelerating our time to market," Narendra Konda, vice president, hardware engineering at NVIDIA Corporation commented.

"MediaTek's innovative SoCs across mobile, smart home and IoT applications continue to grow in complexity to meet increasing customer performance demands. With Cadence's next-generation Dynamic Power Analysis App for the Palladium Emulation System, we are seeing a 5X acceleration for power analysis and direct report generation for our advanced SoC designs compared to the previous version," commented Debra Lin, deputy director, MediaTek.

"Samsung requires best-in-class emulation to develop our most advanced and complex SoCs, and we have utilised the Cadence Palladium Emulation System for many years. With the new 4-State Emulation App, we can accelerate the low-power verification of our complex SoC designs, improving our verification accuracy and low-power coverage while improving overall verification throughput," said Seonil Brian Choi, vice president, Samsung Electronics.