DE0-Nano-SoC development kit features high-speed DDR3 memory and more
17-06-2015 |
Digikey
|
Design & Manufacture
A robust hardware design platform built around the Altera System-on-Chip
(SoC) FPGA, which combines the latest dual-core ARM Cortex-A9 embedded cores
with industry-leading, programmable logic for ultimate design flexibility,
the Terasic DE0-Nano-SoC development kit is now available from Digi-Key.
Users can now harness the power of tremendous re-configurability paired with
a high-performance, low-power processor system. Altera's SoC integrates an
ARM-based hard processor system (HPS) consisting of processor, peripherals,
and memory interfaces tied seamlessly with the FPGA fabric using a
high-bandwidth, interconnect backbone.
The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory,
analog-to-digital capabilities, Ethernet networking, and much more offering
many application opportunities.
The DE0-Nano-SoC development kit contains all the tools needed to use the
board in conjunction with a computer that runs Microsoft Windows XP or
later, says the company.
By Electropages
Electropages is a trusted source of news and insights from the global electronics industry. With a dedicated team of experts and editors, Electropages delivers in-depth articles, product updates, and market trends across sectors such as embedded systems, IoT, connectors, and power solutions. Our mission is to empower engineers and professionals with the knowledge they need to innovate and succeed in a rapidly evolving technological landscape.