New library leads to a huge reduction in code size for RISC-V applications

Segger offers a new version of the RISC-V Floating-Point Library with full support for RV32E – the embedded version of the RISC-V core. The new library directs to a huge reduction in code size for RISC-V applications utilising floating-point.

With all arithmetic functions hand-coded in assembly language, the memory footprint of RISC-V applications employing floating-point code is minimised. The library complies with the RISC-V ABI standard and can, therefore, be effortlessly used as a plug-and-play replacement for any other floating-point library.

Replacing the GNU floating-point library utilised by most toolchains with the company's assembly optimised equivalent results in an above 72% code size decrease of the benchmark application. The library supports RV32I, as well as the newly introduced RV32E embedded version of the RISC-V core with the assembly-level code.

"This new release is much smaller than anything available to us for comparison and, at the same time, is incredibly fast,” says Rolf Segger, founder of SEGGER. "In the world of Embedded Systems, every byte counts. The SEGGER Floating-Point library delivers high performance and uses the architectural advantages of RISC-V to close the code-density gap to comparable Arm Cortex devices. We are convinced that our software is market-leading and – unlike some of our competitors – we facilitate and encourage comparing and benchmarking it.”