Helping to lead the RISC-V revolution

SiFive is creating a new infrastructure to support accelerated ASIC and FPGA design flows, IP delivery, and SoC development. These new developments comprise state-of-the-art compiler algorithms, novel build system integration, and new Verilog RTL generation techniques. It needed a powerful compiler test and verification tool, not only to verify the functionality of its current compiler offering, but also to assist in developing its new IDE infrastructure. The tool SiFive selected was SuperTest from Solid Sands.

“Several of the new developers we hired over the last few years already had experience using SuperTest, so we started with a very good understanding of what it was capable of,” said Sam Grove, director, Product Management, SiFive. “It has already helped us to build and verify a high-quality toolchain that our customers can use straight out of the box.”

Sam and his team use SuperTest for verification and testing of the GCC and LLVM compilers and libraries it supplies with its IDE, and for regression and release testing. Over the two years the company has been employing it, it has helped to identify many previously unknown code generation errors in both compiler systems.

“SuperTest takes virtually no effort to set up and use,” said Richard Fuhler, director, Compiler Development, SiFive.