Low-cost PSoC 5LP prototyping kit offers unmatched one-chip processing power
27-02-2015 |
Cypress
|
Design & Manufacture
Cypress Semiconductor has introduced a new, low-cost prototyping kit that
gives engineers unprecedented access to design with the powerful 32-bit ARM
Cortex-M3 core in Cypress’s PSoC 5LP programmable system-on-chip
architecture.
The CY8CKIT-059 Prototyping Kit delivers PSoC 5LP’s ability to reduce
systems costs by integrating analog front-ends, digital logic and user
interface ICs with the architecture’s programmable analog and programmable
digital blocks. PSoC 5LP also simplifies power architecture design by
supporting the industry’s widest operating voltage range of 0.5V to 5.5V.
The kit, combined with Cypress’s free, easy-to-use PSoC Creator Integrated
Design Environment (IDE) and hundreds of available example projects, enables
rapid prototyping of designs and accelerates time-to-market.
The PSoC 5LP architecture provides unmatched processing performance with a
24-bit digital filter coprocessor and 24 Universal Digital Blocks—Cypress’s
programmable digital blocks containing two programmable logic devices and a
programmable data path with status and control registers. A high-performance
direct memory access (DMA) controller enables smart peripherals to operate
in parallel to the ARM Cortex-M3 core, saving cycles and increasing
throughput. PSoC 5LP one-chip solutions are ideal for a wide range of
applications, including motor control, digital power management, switch mode
power supplies, solar inverters and metering, says the company.
“PSoC 5LP delivers unmatched 32-bit performance with Cypress’s unique
digital coprocessors, such as the Digital Filter Block, for signal
processing to create high-order, 128-tap filters with no impact to the main
processor in a one-chip ARM solution,” said John Weil, vice president of
PSoC marketing, Cypress. “Our new $10 prototyping kit gives designers the
ability to quickly create signal-processor prototypes that leverage the PSoC
5LP architecture’s high level of integration between analog and digital
blocks, as well as its processing power.”
The 4.3-inch by 0.9-inch CY8CKIT-059 Prototyping Kit provides access to all
48 I/Os on the 68-QFN PSoC 5LP device. An additional PSoC 5LP device is
provided as a full-featured programmer and debugger with a novel snap-away
design. PSoC 5LP also simplifies designs with flexible routing of any analog
or digital signal to any GPIO. The PSoC Creator IDE complements the kit and
silicon with more than 100 pre-verified, production-ready components - free
embedded ICs represented by an icon - that can be dragged and dropped into
designs.
The PSoC 5LP includes best-in-class 0.5V startup with integrated boost,
1.71-5.5V fully functional analog, along with an operating range of
0.5-5.5V. These capabilities open up new applications needing single-cell
battery performance and high-precision analog to a world beyond fixed
function MCUs. The architecture includes devices with up to 80-MHz clock
speeds. Additionally, all PSoC 5LP devices offer Cypress’s industry-leading
CapSense capacitive touch-sensing technology for fast implementation of
sleek, reliable touch-sensing user interfaces. Designers can add CapSense
touch-sensing to the CY8CKIT-059 Prototyping Kit without any external
components by simply adding a header to the I/Os, says the company.