Test solution for mixed-signal image sensor designs

Cadence has announced that AltaSens has adopted the Cadence Modus Test Solution for its mixed-signal next-generation image sensors. By using the solution in conjunction with other Cadence digital and verification tools on a 90nm process technology, the company successfully met its aggressive test coverage goals while saving several weeks on design convergence. The solution enabled the company to deliver its first complex digital-on-top (DOT) image sensor design much more efficiently. The solution’s compression logic allowed AltaSens to perform a single pin test, which reduced the impact on the product package and led to reduced test costs. Using the solution’s automatic test pattern generation (ATPG) capabilities, their design team was able to meet fault coverage goals rapidly with greater than 98% static coverage, ensuring that the design functioned as intended and that there were no manufacturing defects that could compromise the image sensors. "The Cadence Modus Test Solution was very easy to use, and we were able to incorporate it seamlessly with our existing flow to create next-generation image sensors,” said Vikram Murali, principal physical design engineer at AltaSens. “We’ve used competitive test solutions previously and decided to switch to the Cadence test solution for this time-sensitive project because we knew it would involve a minimal learning curve and that we’d spend fewer hours on the design.” The solution enables design engineers to reduce test time by up to three times, bringing down production test costs and increasing silicon profit margins.