Simulator and reference models for the newly ratified RISC-V specifications

Imperas Software Ltd now offers the latest product updates as a general release to all its customers and users. Provided as freely available, open-source reference models for the RISC-V community and as commercial products, they now support the latest ratified extensions: Bit Manipulation, Cryptographic (scalar), and Vector, and the Privilege Specification enhancements. These latest additions extend the reach of RISC V projects based on the open standard RISC V ISA aimed at optimised solutions in applications that vary from microcontrollers and application processors, through to multicore arrays for AI, ML, and HPC.

These simulation products and tools are supported with open-source processor and platform models licensed under Apache 2.0 via the Open Virtual Platforms initiative and available at OVPworld.org. To assist the rapid development of a virtual platform/prototype, these models and platforms can be modified and extended as required. The Imperas commercial simulation technology and products are based on the freely available open-standard public OVP application programming interfaces (APIs). The full range of 300+ processor models is based on over 12 ISAs to support heterogeneous designs or for projects migrating other architectures to RISC V.

The Imperas RISC-V reference models are used for design verification (DV) of RISC-V processors and virtual platforms/prototypes to support software development and test throughout the design cycle. The RISC-V community is supported with multiple free-to-use options, including riscvOVPsim, riscvOVPsimPlus, and riscvOVPsimCOREV. Additionally, the Imperas commercial solutions are available with professional support plus extra features for more complex designs. They can also integrate within other standard EDA environments, such as SystemC, SystemVerilog, and well-known simulation and emulation tools from Cadence, Siemens EDA, and Synopsys, plus the cloud-based simulation offering from Metrics Technologies.

“An ISA specification is probably the most important interface in computer science; it defines the boundary between the software program and the underlying hardware,” said Simon Davidmann, CEO, Imperas Software Ltd. “RISC-V is the first broadly adopted open standard ISA with many independent implementations. Unlike the single-source developments of the past, RISC-V is community-based with both open-source and proprietary commercial supporters. We are pleased to announce today that the Imperas simulation technology and models are ready to support the fully ratified specifications, plus all the major previous revisions as we continue to support our users.”