Cadence


Interconnect designer and SiP reduces design time by 60 percent

Cadence Design Systems has announced that Faraday Technology has used Cadence OrbitIO interconnect designer and Cadence SiP Layout to reduce its packaging design time by 60 percent

Design Applications | 06-05-2016

Mixed-signal low-power flow significantly reduces design time

Cadence Design Systems has announced that Silicon Labs used a Cadence mixed-signal low-power flow to reduce overall design time, significantly speeding time to market. Silicon Labs

25-02-2016

First IP core approved for Dolby MS12 multistream decoder

Cadence Design Systems has announced that its audio core for system-on-chip (SoC) designs has been approved for using the Dolby MS12 multistream decoder, an all-in-one audio soluti

New Technologies | 06-01-2016

Industry’s first memory model for LPDDR5

Cadence has announced the Cadence Memory Model for the LPDDR5 standard. This new verification IP (VIP) product enables engineers to verify that system-on-chip (SoC) designs are com

New Technologies | 13-10-2015

Latest imaging and vision DSP core offers up to 13X performance boost

Cadence Design Systems has announced the new Cadence Tensilica Vision P5 digital signal processor (DSP), its flagship high-performance vision/imaging DSP core. The imaging and visi

Products | 08-10-2015

Palladium XP platform adopted for verification and validation of IoT SoC designs

Cadence Design Systems has announced that Altair Semiconductor adopted the Cadence Palladium XP platform for the verification and validation of its Internet of Things (IoT) system-

Design Applications | 03-09-2015

New system can significantly shorten PCB manufacturing times

Cadence Design Systems has unveiled the Allegro 16.6 portfolio, which features several new products and technologies. Included in this release is the new Allegro PCB Designer Man

21-05-2015

New DSP sets low-energy benchmarks for IoT, wearables and wireless connectivity

Based on the proven Xtensa customizable processor, Cadence Design Systems has introduced the new Tensilica Fusion digital signal processor (DSP). The scalable DSP targets appli

Products | 24-04-2015

Complete development environment for ARM Premium Mobile IP Suite

Cadence Design Systems has announced availability of a complete system-on-chip (SoC) development environment supporting the new ARM premium mobile IP suite that incorporates the

Products | 06-02-2015

New audio solution enables emerging multi-channel object-based standards

Cadence Design Systems has announced the Cadence Tensilica HiFi 4 audio / voice digital signal processor (DSP) intellectual property (IP) core for system-on-chip (SoC) designs, w

New Technologies | 09-01-2015