Consortium accelerates high-speed AI connections

Alphawave Semi has joined the newly formed Ultra Accelerator Link Consortium (UALink).

With the emergence of accelerated compute infrastructure to facilitate AI workloads spanning compute, training and inference, new purpose-built scale-up networks are needed to scale data centre infrastructure to meet the specialised compute demands that general-purpose systems are falling short to meet.

UALink is an open industry standardised fabric interconnect for accelerator-to-accelerator communication designed to provide low-latency and high-bandwidth interface to fulfil the needs of scale-up AI infrastructure, enabling the coherency of operations between large nodes of AI accelerators.

The interface pools up to 1,024 XPUs into a single node with a latency of less than 100ns pin-to-pin and supports data transfer at up to 224Gbps per lane. By optimising the data and transaction layers, UALink greatly reduces die area, power and overhead compared to other solutions.

The Consortium membership unites expertise from hyperscalers, system OEMs, accelerator and switch developers; Alphawave Semi plans on bringing its leadership in connectivity subsystems and chiplets to the consortium. The UALink Consortium was incorporated in October 2024 by a coalition of leading AI technology companies, including AMD, Amazon Web Services, Cisco, Google, HPE, Intel, Meta and Microsoft.

Letizia Giuliano, Alphawave Semi's VP of IP Product Marketing said "Alphawave Semi is at the forefront of connectivity for AI and HPC, and by working with the UALink Consortium we will deliver our industry leading performance in connectivity solutions for timely, practical solutions to our customers to form the backbone of AI infrastructure."

The UALink 1.0 specification will be available in Q1 2025.